Data processing apparatus for transmitting/receiving indication information of pixel data grouping setting via display interface and related data processing method

ABSTRACT

A data processing apparatus includes a compression circuit and an output interface. The compression circuit generates a plurality of compressed pixel data groups by compressing pixel data of a plurality of pixels of a picture based on a pixel data grouping setting of the picture. The output interface records indication information in an output bitstream, and outputs the output bitstream via a display interface. The output bitstream is derived from the compressed pixel data groups. The indication information is set in response to the pixel data grouping setting employed by the compression circuit.

CROSS REFERENCE TO RELATED APPLICATIONS

This application claims the benefit of U.S. provisional application No.61/865,345, filed on Aug. 13, 2013 and incorporated herein by reference.

BACKGROUND

The disclosed embodiments of the present invention relate totransmitting and receiving data over a display interface, and moreparticularly, to a data processing apparatus for transmitting/receivingindication information of a pixel data grouping setting over a displayinterface and a related data processing method.

A display interface is disposed between a first chip and a second chipto transmit display data from the first chip to the second chip forfurther processing. For example, the first chip may be a hostapplication processor, and the second chip may be a driver integratedcircuit (IC). The display data may be single view data fortwo-dimensional (2D) display or multiple view data for three-dimensional(3D) display. When a display panel supports a higher display resolution,2D/3D display with higher resolution can be realized. Hence, the displaydata transmitted over the display interface would have a larger datasize/data rate, which increases the power consumption of the displayinterface inevitably. If the host application processor and the driverIC are both located at a portable device (e.g., a smartphone) powered bya battery device, the battery life is shortened due to the increasedpower consumption of the display interface. Thus, there is a need for aninnovative design which can effectively reduce the power consumption ofthe display interface.

SUMMARY

In accordance with exemplary embodiments of the present invention, adata processing apparatus for transmitting/receiving indicationinformation of a pixel data grouping setting over a display interfaceand a related data processing method are proposed.

According to a first aspect of the present invention, an exemplary dataprocessing apparatus is disclosed. The exemplary data processingapparatus includes a compression circuit and an output interface. Thecompression circuit is configured to generate a plurality of compressedpixel data groups by compressing pixel data of a plurality of pixels ofa picture based on a pixel data grouping setting of the picture. Theoutput interface is configured to record indication information in anoutput bitstream and outputting the output bitstream via a displayinterface, wherein the output bitstream is derived from the compressedpixel data groups, and the indication information is set in response tothe pixel data grouping setting employed by the compression circuit.

According to a second aspect of the present invention, an exemplary dataprocessing apparatus is disclosed. The exemplary data processingapparatus includes a plurality of de-compressors and an input interface.Each of the de-compressors is configured to decompress a compressedpixel data group derived from an input bitstream when selected. Theinput interface is configured to receive the input bitstream via adisplay interface, and parse indication information included in theinput bitstream, wherein multiple de-compressors are selected from thede-compressors according to the indication information.

According to a third aspect of the present invention, an exemplary dataprocessing method is disclosed. The exemplary data processing methodincludes: generating a plurality of compressed pixel data groups bycompressing pixel data of a plurality of pixels of a picture based on apixel data grouping setting of the picture; and recording indicationinformation in an output bitstream, and outputting the output bitstreamvia a display interface, wherein the output bitstream is derived fromthe compressed pixel data groups, and the indication information is setin response to the pixel data grouping setting.

According to a fourth aspect of the present invention, an exemplary dataprocessing method is disclosed. The exemplary data processing methodincludes: receiving an input bitstream via a display interface; parsingindication information included in the input bitstream; selectingmultiple de-compressors from a plurality of de-compressors according tothe indication information; and utilizing the selected multiplede-compressors to de-compress a plurality of compressed pixel datagroups derived from the input bitstream, respectively.

These and other objectives of the present invention will no doubt becomeobvious to those of ordinary skill in the art after reading thefollowing detailed description of the preferred embodiment that isillustrated in the various figures and drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram illustrating a data processing systemaccording to an embodiment of the present invention.

FIG. 2 is a diagram illustrating exemplary pixel data grouping patternseach dividing one picture in a first direction.

FIG. 3 is a diagram illustrating exemplary pixel data grouping patternseach dividing one picture in a second direction.

FIG. 4, which is a diagram illustrating a data structure of an outputbitstream generated from an application processor to a driver ICaccording to an embodiment of the present invention.

FIG. 5 is a diagram illustrating an example of information handshakingbetween the application processor and the driver IC.

FIG. 6 is a flowchart illustrating a control and data flow of a dataprocessing system shown in FIG. 1 according to an embodiment of thepresent invention.

DETAILED DESCRIPTION

Certain terms are used throughout the description and following claimsto refer to particular components. As one skilled in the art willappreciate, manufacturers may refer to a component by different names.This document does not intend to distinguish between components thatdiffer in name but not function. In the following description and in theclaims, the terms “include” and “comprise” are used in an open-endedfashion, and thus should be interpreted to mean “include, but notlimited to . . . ”. Also, the term “couple” is intended to mean eitheran indirect or direct electrical connection. Accordingly, if one deviceis coupled to another device, that connection may be through a directelectrical connection, or through an indirect electrical connection viaother devices and connections.

The present invention proposes applying data compression to a displaydata and then transmitting a compressed display data over a displayinterface. As the data size/data rate of the compressed display data issmaller than that of the original un-compressed display data, the powerconsumption of the display interface is reduced correspondingly.However, there may be a throughput bottleneck for acompression/de-compression system due to long data dependency ofprevious compressed/reconstructed data. To minimize or eliminate thethroughput bottleneck of the compression/de-compression system, thepresent invention further proposes a data parallelism design. In thisway, multiple compressed pixel data groups are independently generatedat a transmitting end, and multiple de-compressed pixel data groups areindependently generated at a receiving end. The de-compressionconfiguration employed by the receiving end is required to be compliantwith the compression configuration employed by the transmitting end;otherwise, the receiving end fails to correctly de-compress thecompressed display data. The present invention further proposestransmitting/receiving indication information of a pixel data groupingsetting via the display interface, such that the de-compressionconfiguration of the receiving end can be correctly configured based onthe received indication information. Further details will be describedas below.

FIG. 1 is a block diagram illustrating a data processing systemaccording to an embodiment of the present invention. The data processingsystem 100 includes a plurality of data processing apparatuses such asan application processor 102 and a driver integrated circuit (IC) 104.The application processor 102 and the driver IC 104 may be implementedin different chips, and the application processor 102 communicates withthe driver IC 104 via a display interface 103. In this embodiment, thedisplay interface 103 may be a display serial interface (DSI)standardized by a Mobile Industry Processor Interface (MIPI) or anembedded display port (eDP) standardized by a Video ElectronicsStandards Association (VESA).

The application processor 102 is coupled between the display interface103 and a data source 105, and supports compressed data transmission.The application processor 102 receives an input display data from theexternal data source 105, where the input display data may be image dataor video data that includes pixel data DI of a plurality of pixels of apicture to be processed. By way of example, but not limitation, the datasource 105 may be a camera sensor, a memory card or a wireless receiver.As shown in FIG. 1, the application processor 102 includes a displaycontroller 111, an output interface 112 and a processing circuit 113.The processing circuit 113 includes circuit elements required forprocessing the pixel data DI to generate a plurality of compressed pixeldata groups DG₁′-DG_(N)′, where N is a positive integer. For example,the processing circuit 113 has a compression circuit 114 and othercircuitry 117. The compression circuit 114 may have a mapper/splitter, aplurality of compressors, etc. The other circuitry 115 may have adisplay processor, additional image processing element (s), etc. Thedisplay processor may perform image processing operations, includingscaling, rotating, etc. For example, the input display data provided bythe data source 105 may be bypassed or processed by the additional imageprocessing element (s) located before the display processor to generatea source display data, and then the display processor may process thesource display data to generate the pixel data DI to the compressioncircuit 114. In other words, the pixel data DI to be processed by thecompression circuit 114 may be directly provided from the data source105 or indirectly obtained from the input display data provided by thedata source 105. The present invention has no limitation on the sourceof the pixel data DI.

Regarding the compression circuit 114, it may use the mapper/splitter tosplit the pixel data DI of one picture into N pixel data groupsaccording to a pixel data group setting DG_(SET). Next, the compressioncircuit 114 may enable N compressors selected from a plurality ofpre-built compressors to compress the N pixel data groups to generatethe compressed pixel data groups DG₁′-DG_(N)′, respectively.Specifically, the number of enabled compressors depends on the number ofpixel data groups. In addition, each of the enabled compressors mayemploy a lossless compression algorithm or a lossy compressionalgorithm, depending upon the actual design consideration. In thisembodiment, compression operations performed by the enabled compressorsare independent of each other. In this way, the compression throughputof the application processor 102 can be improved due to dataparallelism.

The output interface 112 is configured to pack/packetize the compressedpixel data groups DG₁′-DG_(N)′ into at least one output bitstreamaccording to the transmission protocol of the display interface 103, andtransmit the at least one output bitstream to the driver IC 104 via thedisplay interface 103. By way of example, one bitstream BS may begenerated from the application processor 102 to the driver IC 104 viaone display port of the display interface 103.

Regarding the driver IC 104, it communicates with the applicationprocessor 102 via the display interface 103. In this embodiment, thedriver IC 104 is coupled between the display interface 103 and a displaypanel 106, and supports compressed data reception. By way of example,the display panel 106 may be implemented using any 2D/3D display device.When the application processor 102 transmits compressed display data(e.g., compressed pixel data groups DG₁′-DG_(N)′ packed in the bitstreamBS) to the driver IC 104, the driver IC 104 is configured to receive thecompressed display data from the display interface 103 and drive thedisplay panel 106 according to de-compressed display data derived fromde-compressing the compressed display data.

As shown in FIG. 1, the driver IC 104 includes a driver IC controller121, an input interface 122 and a processing circuit 123. The inputinterface 122 is configured to receive at least one input bitstream fromthe display interface 103 (e.g., the bitstream BS received by onedisplay port of the display interface 103), and un-pack/un-packetize theat least one input bitstream into a plurality of compressed pixel datagroups of a picture (e.g., N compressed pixel data groups). It should benoted that, if there is no error introduced during the datatransmission, the compressed pixel data groups generated from the inputinterface 122 should be identical to the compressed pixel data groupsDG₁′-DG_(N)′ received by the output interface 112.

The processing circuit 123 may include circuit elements required fordriving the display panel 106. For example, the processing circuit 123has a plurality of de-compressors (e.g., M de-compressors 124_1-124_M,where M is a positive integer and M≧N), a plurality of switches (e.g., Mswitches 126_1-126_M), and other circuitry 125. The other circuitry 125may have a de-mapper/combiner, a display buffer, additional imageprocessing element (s), etc. Each of the de-compressors 124_1-124_M isconfigured to decompress a compressed pixel data group when selected. Itshould be noted that the number of switches 126_1-126_M is equal to thenumber of de-compressors 124_1-124_M. Hence, each of the switches126_1-126_N controls whether a corresponding de-compressor is selectedfor data de-compression. In this embodiment, the switches 126_1-126_Mare respectively controlled by a plurality of enable signals EN₀-EN_(M)generated from the driver IC controller 121. When an enable signal has afirst logic value (e.g., ‘1’), a corresponding switch is enabled (i.e.,switched on) to make a following de-compressor selected; and when theenable signal has a second logic value (e.g., ‘0’), the correspondingswitch is disabled (i.e., switched off) to make a followingde-compressor unselected.

The driver IC 104 has multiple pre-built de-compressors (e.g., multiplecores) so as to realize different de-compression capability (orthroughput). In this embodiment, since the input interface 122 obtains Ncompressed pixel data groups from de-packing/de-packetizing thebitstream BS, the driver IC controller 121 is configured to select Nde-compressors from the de-compressors 124_1-124_M for datade-compression. In this embodiment, the unselected (M−N) de-compressorsmay be clock-gated for power saving. The selected de-compressors areused to de-compress the N compressed pixel data groups to generate aplurality of de-compressed pixel data groups, respectively. In thisembodiment, the de-compression operations performed by the selectedde-compressors are independent of each other. In this way, thede-compression throughput is improved due to data parallelism.

The de-compression algorithm employed by each of the selectedde-compressors in the driver IC 104 should be properly configured tomatch the compression algorithm employed by each of the compressors inthe compression circuit 114. In other words, the selected de-compressorsare configured to perform lossless de-compression when the compressorsin the compression circuit 114 are configured to perform losslesscompression; and the selected de-compressors are configured to performlossy de-compression when the compressors in the compression circuit 114are configured to perform lossy compression.

The de-mapper/combiner in the other circuit 125 is configured to mergethe de-compressed pixel data groups into pixel data DO of a plurality ofpixels of a reconstructed picture based on the pixel data groupingsetting DG_(SET) that is employed by a mapper/splitter in thecompression circuit 114. The driver IC 104 drives the display panel 106according to the pixel data DO of the reconstructed picture.

The pixel data group setting DG_(SET) is related to the number of pixeldata groups processed by the compression circuit 114. In other words,the pixel data group setting DG_(SET) is related to the number ofenabled compressors in the compression circuit 114. In this embodiment,the pixel data grouping setting DG_(SET) employed by the compressioncircuit 114 is transmitted from the application processor 102 to thedriver IC 104 via an in-band channel (i.e., display interface 103).Specifically, the display controller 111 controls the operation of theapplication processor 102, and the driver IC controller 121 controls theoperation of the driver IC 104. Hence, the display controller 111 mayfirst check a de-compression capability and requirement of the driver IC104, and then determine the number of pixel data groups in response to achecking result. In addition, the display controller 111 may furtherdetermine the pixel data grouping setting DG_(SET) employed by thecompression circuit 114 to generate the pixel data groups that satisfythe de-compression capability and requirement of the driver IC 104, andtransmit the pixel data grouping setting DG_(SET) over display interface103. When receiving a query issued from the display controller 111, thedriver IC controller 121 informs the display controller 111 of thede-compression capability and requirement of the driver IC 104. Inaddition, when receiving the pixel data grouping setting DG_(SET) fromdisplay interface 103, the driver IC controller 121 refers to thereceived pixel data grouping setting DG_(SET) to properly set the enablesignals EN₁-EN_(M), such that multiple de-compressors are selected fordata de-compression.

For example, the application processor 102 may refer to information ofthe de-compression capability and requirement informed by the driver IC104 to decide the throughput P1 (pixels per clock cycle) of onede-compressor in the driver IC 104 and the target throughput requirementP2 (pixels per clock cycle) of the display panel 106 driven by thedriver IC 104. Assume that the throughput of one compressor in theapplication processor is also P1 (pixels per clock cycle). When P2/P1 isnot greater than one, this means that using a single compressor at theAP side and a single de-compressor at the driver IC side is capable ofmeeting the throughput requirement. Hence, the proposed data parallelismscheme is inactivated, and the conventional compression andde-compression is performed. In this case, the enable signals EN₁-EN₄may be set by {1, 0, 0, 0} for allowing a single de-compressor to beenabled. When P2/P1 is greater than one, this means that using a singlecompressor at the AP side and a single de-compressor at the driver ICside is unable to meet the throughput requirement. Hence, the proposeddata parallelism scheme is activated. In addition, the number ofcompressors enabled in the application processor 102 and the number ofde-compressors enabled in the driver IC 102 may be determined based onthe value of P2/P1 (which will be considered by the display controller111 to determine the pixel data grouping setting DG_(SET)).

The present invention proposes several pixel data grouping patterns thatcan be used to split pixel data of a plurality of pixels of one pictureinto multiple pixel data groups. FIG. 2 is a diagram illustratingexemplary pixel data grouping patterns each dividing one picture in afirst direction. Suppose that the number of de-compressors 124_1-124_Mimplemented in the driver IC 104 is four (i.e., M=4). Hence, the fourenable signals EN₁-EN₄ should be properly set to decide whichde-compressors should be used for de-compression. When the pixel datagrouping pattern in sub-diagram (A) of FIG. 2 is employed, the pixeldata grouping setting DG_(SET) is set by the display controller 111 toinstruct the mapper/splitter in the compression circuit 114 to split onepicture with a resolution of W×H into four sub-pictures A₁, A₂, A₃, A₄each having a resolution of (W/4)×H. Hence, the number of compressedpixel data groups DG₁′-DG_(N)′ generated from the compression circuit114 is equal to four (i.e., N=4). For example, the compression circuit114 enables four compressors to compress pixel data of the sub-picturesA₁-A₄ into four compressed pixel data groups, respectively. Hence, whenreceiving the pixel data grouping setting DG_(SET), the driver ICcontroller 121 sets the enable signals EN₁-EN₄ by {1, 1, 1, 1}, suchthat four de-compressors are selected to decompress the four compressedpixel data groups, respectively.

When the pixel data grouping pattern in sub-diagram (B) of FIG. 2 isemployed, the pixel data grouping setting DG_(SET) is set by the displaycontroller 111 to instruct the mapper/splitter in the compressioncircuit 114 to split one picture with a resolution of W×H into threesub-pictures A₁, A₂, A₃ each having a resolution of (W/3)×H. Hence, thenumber of compressed pixel data groups DG₁′-DG_(N)′ generated from thecompression circuit 114 is equal to three (i.e., N=3). For example, thecompression circuit 114 enables three compressors to compress pixel dataof the sub-pictures A₁-A₃ into three compressed pixel data groups,respectively. Hence, when receiving the pixel data grouping settingDG_(SET), the driver IC controller 121 sets the enable signals EN₁-EN₄by {1, 1, 1, 0}, such that three de-compressors are selected todecompress the three compressed pixel data groups, respectively.

When the pixel data grouping pattern in sub-diagram (C) of FIG. 2 isemployed, the pixel data grouping setting DG_(SET) is set by the displaycontroller 111 to instruct the mapper/splitter in the compressioncircuit 114 to split one picture with a resolution of W×H into twosub-pictures A₁ and A₂ each having a resolution of (W/2)×H. Hence, thenumber of compressed pixel data groups DG₁′-DG_(N)′ generated from thecompression circuit 114 is equal to two (i.e., N=2). For example, thecompression circuit 114 enables two compressors to compress pixel dataof the sub-pictures A₁ and A₂ into two compressed pixel data groups,respectively. Hence, when receiving the pixel data grouping settingDG_(SET), the driver IC controller 121 sets the enable signals EN₁-EN₄by {1, 1, 0, 0}, such that two de-compressors are selected to decompressthe two compressed pixel data groups, respectively.

In above exemplary pixel data grouping patterns shown in FIG. 2, eachpixel row of a picture is divided into multiple sections, while eachpixel column of the same picture remains intact. Alternatively, eachpixel column of a picture may be divided into multiple sections, whileeach pixel row in the same picture may remain intact. FIG. 3 is adiagram illustrating exemplary pixel data grouping patterns eachdividing one picture in a second direction. When the pixel data groupingpattern in sub-diagram (A) of FIG. 3 is employed, the pixel datagrouping setting DG_(SET) is set by the display controller 111 toinstruct the mapper/splitter in the compression circuit 114 to split onepicture with a resolution of W×H into four sub-pictures B₁, B₂, B₃, B₄each having a resolution of W×(H/4). Hence, the number of compressedpixel data groups DG₁′-DG_(N)′ generated from the compression circuit114 is equal to four (i.e., N=4). For example, the compression circuit114 enables four compressors to compress pixel data of the sub-picturesB₁-B₄ into four compressed pixel data groups, respectively. Hence, whenreceiving the pixel data grouping setting DG_(SET), the driver ICcontroller 121 sets the enable signals EN₁-EN₄ by {1, 1, 1, 1}, suchthat four de-compressors are selected to decompress the four compressedpixel data groups, respectively.

When the pixel data grouping pattern in sub-diagram (B) of FIG. 3 isemployed, the pixel data grouping setting DG_(SET) is set by the displaycontroller 111 to instruct the mapper/splitter in the compressioncircuit 114 to split one picture with a resolution of W×H into threesub-pictures B₁, B₂, B₃ each having a resolution of W×(H/3). Hence, thenumber of compressed pixel data groups DG₁′-DG_(N)′ generated from thecompression circuit 114 is equal to three (i.e., N=3). For example, thecompression circuit 114 enables three compressors to compress pixel dataof the sub-pictures B₁-B₃ into three compressed pixel data groups,respectively. Hence, when receiving the pixel data grouping settingDG_(SET), the driver IC controller 121 sets the enable signals EN₁-EN₄by {1, 1, 1, 0}, such that three de-compressors are selected todecompress the three compressed pixel data groups, respectively.

When the pixel data grouping pattern in sub-diagram (C) of FIG. 3 isemployed, the pixel data grouping setting DG_(SET) is set to instructthe mapper/splitter in the compression circuit 114 to split one picturewith a resolution of W×H into two sub-pictures B₁ and B₂ each having aresolution of W×(H/2). Hence, the number of compressed pixel data groupsDG₁′-DG_(N)′ generated from the compression circuit 114 is equal to two(i.e., N=2). For example, the compression circuit 114 enables twocompressors to compress pixel data of the sub-pictures B₁ and B₂ intotwo compressed pixel data groups, respectively. Hence, when receivingthe pixel data grouping setting DG_(SET), the driver IC controller 121sets the enable signals EN₁-EN₄ by {1, 1, 0, 0}, such that twode-compressors are selected to decompress the two compressed pixel datagroups, respectively.

As shown in FIG. 2, the horizontal image partitioning is applied to apicture, thus resulting in multiple sub-pictures arranged horizontallyin the picture. As shown in FIG. 3, the vertical image partitioning isapplied to a picture, thus resulting in multiple sub-pictures arrangedvertically in the picture. However, these are for illustrative purposesonly, and are not meant to be limitations of the present invention. Inpractice, the present invention has no limitation on the design of thepixel data grouping pattern. For example, one picture may be split intosub-pictures based on a line-by-line interleaving pattern. In this way,each sub-picture is composed of pixels of one pixel line (e.g., a pixelrow or a pixel column). For another example, one picture may be splitinto sub-pictures based on a checkerboard pattern. In this way, eachsub-picture is composed of pixels of one A×B block, where A and B arepositive integers, and A may be equal to or different from B. Thesealternative pixel data grouping pattern designs all fall within thescope of the present invention.

In this embodiment, the output interface 112 records indicationinformation INF of the pixel data grouping setting DG_(SET) by setting acommand set in a payload portion of the output bitstream transmittedover the display interface 103, and the input interface 122 obtains theindication information INF of the pixel data grouping setting DG_(SET)by parsing a command set in a payload portion of the input bitstreamreceived from the display interface 103. Please refer to FIG. 4, whichis a diagram illustrating a data structure of the output bitstreamgenerated from the application processor 102 to the driver IC 104according to an embodiment of the present invention. The informationhandshaking between the application processor 102 and the driver IC 104may be realized by defining a set of commands in the transmittedpayload. For example, these commands can be specified in either a usercommand set or a manufactured command set based on MIPI display commandset (DCS) specification, where each command in a command set is an 8-bitcode, and the command set can be used to communicate between theapplication processor 102 and the driver IC 104 about the pixel datagrouping setting DG_(SET). Please refer to FIG. 5, which is a diagramillustrating an example of information handshaking between theapplication processor 102 and the driver IC 104. In this example, theapplication processor 102 may support at least six pixel data groupingpatterns, as shown in FIG. 2 and FIG. 3. In addition, the driver IC 104may support at least three settings for enable signals EN₁-EN₄, as shownin FIG. 2 and FIG. 3. The application processor 102 checks ade-compression capability and requirement of the driver IC 104 bysending a request to the driver IC 104 through the display interface103, and the driver IC 104 informs the application processor 102 of itsde-compression capability and requirement by sending a response to theapplication processor 102 through the display interface 103. Based onthe information given by the driver IC 104, the application processor102 determines the pixel data grouping setting DG_(SET) by using thepixel data grouping pattern #0. Hence, the indication information INF isset by an 8-bit code 8′h00 to indicate the use of the pixel datagrouping pattern #0. The indication information INF is carried by thecommand set transmitted from the application processor 102 to the driverIC 104 via the display interface 103. The driver IC 104 receives theindication information INF through the display interface 103, and refersto the 8-bit code 8′h00 to know that the pixel data grouping pattern #0is selected by the application processor 102. Hence, based on theindication information INF of the pixel data grouping setting DG_(SET),the driver IC 104 sets the enable signals EN₁-EN₄ by {1, 1, 1, 1}correspondingly.

FIG. 6 is a flowchart illustrating a control and data flow of the dataprocessing system 100 shown in FIG. 1 according to an embodiment of thepresent invention. Provided that the result is substantially the same,the steps are not required to be executed in the exact order shown inFIG. 6. The exemplary control and data flow may be briefly summarized byfollowing steps.

Step 602: Check a de-compression capability and requirement of a driverIC.

Step 603: Inform an application processor of the de-compressioncapability and requirement.

Step 604: Determine a pixel data grouping setting according to achecking result. For example, one of the pixel data grouping patternsshown in FIG. 2 and FIG. 3 may be selected.

Step 606: Generate a plurality of compressed pixel data groups by usingcompressors to compress a plurality of pixel data groups obtained frompixel data of a plurality of pixels of a picture based on the pixel datagrouping setting.

Step 608: Pack/packetize the compressed pixel data groups into an outputbitstream.

Step 610: Record indication information of the pixel data groupingsetting in the output bitstream. For example, the indication informationis recorded in a command set of a payload portion of the outputbitstream.

Step 612: Transmit the output bitstream via a display interface.

Step 614: Receive an input bitstream from the display interface.

Step 616: Parse indication information of the pixel data groupingsetting from the input bitstream. For example, the indicationinformation is obtained from a command set of a payload portion of theinput bitstream.

Step 618: Un-pack/un-packetize the input bitstream into a plurality ofcompressed data groups.

Step 620: Select multiple de-compressors according to the indicationinformation.

Step 622: Generate pixel data of a plurality of pixels of areconstructed picture by using the selected de-compressors tode-compress the compressed pixel data groups, independently, and thenmerging a plurality of de-compressed pixel data groups based on thepixel data grouping setting as indicated by the indication information.

It should be noted that steps 602 and 604-612 are performed by theapplication processor (AP) 102, and steps 603 and 614-622 are performedby the driver IC 104. As a person skilled in the art can readilyunderstand details of each step shown in FIG. 6 after reading aboveparagraphs, further description is omitted here for brevity.

Those skilled in the art will readily observe that numerousmodifications and alterations of the device and method may be made whileretaining the teachings of the invention. Accordingly, the abovedisclosure should be construed as limited only by the metes and boundsof the appended claims.

What is claimed is:
 1. A data processing apparatus, comprising: acompression circuit, configured to generate a plurality of compressedpixel data groups by compressing pixel data of a plurality of pixels ofa picture based on a pixel data grouping setting of the picture; and anoutput interface, configured to record indication information in anoutput bitstream and outputting the output bitstream via a displayinterface, wherein the output bitstream is derived from the compressedpixel data groups, and the indication information is set in response tothe pixel data grouping setting employed by the compression circuit. 2.The data processing apparatus of claim 1, wherein the display interfaceis a display serial interface (DSI) standardized by a Mobile IndustryProcessor Interface (MIPI) or an embedded display port (eDP)standardized by a Video Electronics Standards Association (VESA).
 3. Thedata processing apparatus of claim 1, wherein the output interface isconfigured to record the indication information by setting a command setin a payload portion of the output bitstream.
 4. The data processingapparatus of claim 1, wherein the data processing apparatus is coupledto another data processing apparatus via the display interface, and thedata processing apparatus further comprises: a controller, configured tocheck a de-compression capability and requirement of the another dataprocessing apparatus, and determine the pixel data grouping setting ofthe picture in response to a checking result.
 5. A data processingapparatus, comprising: a plurality of de-compressors, each configured todecompress a compressed pixel data group derived from an input bitstreamwhen selected; and an input interface, configured to receive the inputbitstream via a display interface, and parse indication informationincluded in the input bitstream, wherein multiple de-compressors areselected from the de-compressors according to the indicationinformation.
 6. The data processing apparatus of claim 5, wherein thedisplay interface is a display serial interface (DSI) standardized by aMobile Industry Processor Interface (MIPI) or an embedded display port(eDP) standardized by a Video Electronics Standards Association (VESA).7. The data processing apparatus of claim 5, wherein the input interfaceis configured to obtain the indication information by parsing a commandset in a payload portion of the input bitstream.
 8. The data processingapparatus of claim 5, wherein the data processing apparatus is coupledto another data processing apparatus via the display interface, and thedata processing apparatus further comprises: a controller, configured toinform the another data processing apparatus of a de-compressioncapability and requirement of the data processing apparatus.
 9. A dataprocessing method, comprising: generating a plurality of compressedpixel data groups by compressing pixel data of a plurality of pixels ofa picture based on a pixel data grouping setting of the picture; andrecording indication information in an output bitstream, and outputtingthe output bitstream via a display interface, wherein the outputbitstream is derived from the compressed pixel data groups, and theindication information is set in response to the pixel data groupingsetting.
 10. The data processing method of claim 9, wherein the displayinterface is a display serial interface (DSI) standardized by a MobileIndustry Processor Interface (MIPI) or an embedded display port (eDP)standardized by a Video Electronics Standards Association (VESA). 11.The data processing method of claim 9, wherein the step of recording theindication information in the output bitstream comprises: recording theindication information by setting a command set in a payload portion ofthe output bitstream.
 12. The data processing method of claim 9, whereinthe output bitstream is transmitted from a first data processingapparatus to a second data processing apparatus via the displayinterface, and the data processing method further comprises: checking ade-compression capability and requirement of the second data processingapparatus, and determining the pixel data grouping setting of thepicture in response to a checking result.
 13. A data processing method,comprising: receiving an input bitstream via a display interface;parsing indication information included in the input bitstream;selecting multiple de-compressors from a plurality of de-compressorsaccording to the indication information; and utilizing the selectedmultiple de-compressors to de-compress a plurality of compressed pixeldata groups derived from the input bitstream, respectively.
 14. The dataprocessing method of claim 13, wherein the display interface is adisplay serial interface (DSI) standardized by a Mobile IndustryProcessor Interface (MIPI) or an embedded display port (eDP)standardized by a Video Electronics Standards Association (VESA). 15.The data processing method of claim 13, wherein the step of parsing theindication information included in the input bitstream comprises:obtaining the indication information by parsing a command set in apayload portion of the input bitstream.
 16. The data processing methodof claim 13, wherein the input bitstream is transmitted from a seconddata processing apparatus and received by a first data processingapparatus via the display interface, and the data processing methodfurther comprises: informing the second data processing apparatus of ade-compression capability and requirement of the first data processingapparatus.